PCB layout rules ALLICDATA
10 rules for component layout:
Follow the layout principle of “first big and then small, first difficult and easy”, that is, important unit circuits and core components should be prioritized.
The layout should refer to the principle block diagram, and arrange the main components according to the main signal flow direction of the board.
The arrangement of components should be easy to debug and repair, that is, there should be no large components around the small components, the components to be debugged, and there should be enough space around the device.
For the same structural circuit part, use the "symmetric" standard layout as much as possible;
Optimize the layout according to the standard of uniform distribution, balance of center of gravity, and beautiful layout;
The same type of plug-in components should be placed in one direction in the X or Y direction. The same type of polar discrete components must also strive to be consistent in the X or Y direction for ease of production and inspection.
The heating elements should be evenly distributed to facilitate the heat dissipation of the single board and the whole machine. Temperature sensitive components other than the temperature detecting components should be kept away from the components with large heat generation.
The layout should try to meet the following requirements: the total connection is as short as possible, the key signal line is the shortest; the high voltage, high current signal is separated from the low current and low voltage weak signals; the analog signal is separated from the digital signal; the high frequency signal and the low frequency The signals are separated; the spacing of the high frequency components is sufficient.
The layout of the decoupling capacitor should be as close as possible to the power supply pin of the IC and the loop formed between the power supply and the ground should be the shortest.
When placing components, it should be considered that devices using the same power supply should be placed together as much as possible to facilitate future power separation.
Second, wiring
(1) Routing priority
Key signal line priority: simulate key signal priority routing such as small signal, high speed signal, clock signal and synchronization signal
Density priority principle: Start wiring from the most complex devices connected on the board. Wire from the densest area of the board connection
be careful:
Try to provide a special wiring layer for key signals such as clock signals, high-frequency signals, and sensitive signals, and ensure the minimum loop area. Manually prioritize wiring, shielding, and increasing safety clearance should be used when necessary. Guarantee signal quality.
The EMC environment between the power plane and the ground plane is poor, and interference-sensitive signals should be avoided.
Networks with impedance control requirements should be routed as much as possible for line length and linewidth.
(2) Four specific routing methods
1, the wiring of the clock:
The clock line is one of the most influential factors for EMC. You should make fewer holes on the clock line, try to avoid running lines with other signal lines, and keep away from the general signal lines to avoid interference with the signal lines. Also avoid the power section on the board to prevent the power supply and clock from interfering with each other.
If there is a special clock-generating chip on the board, the bottom of the chip cannot be routed. Copper should be laid underneath it, and if necessary, it can be specially cut. For crystal oscillators with reference to many chips, these crystal oscillators should not be routed underneath, and copper isolation is required.
2, right angle routing:
Right-angle traces are generally required to avoid PCB layout, and are almost one of the criteria for measuring the quality of the cabling. How much influence does the right-angle trace have on signal transmission? In principle, a right-angled trace changes the line width of the transmission line, causing a discontinuity in impedance. In fact, not only the right-angled lines, but also the angles and sharp-angled lines may cause impedance changes.
The effect of the right-angled line on the signal is mainly reflected in three aspects:
The corner can be equivalent to the capacitive load on the transmission line, slowing down the rise time;
Discontinuity of the impedance will cause reflection of the signal;
EMI generated by the right angle tip.
3. Differential routing:
Differential signal is widely used in high-speed circuit design. The most critical signals in the circuit often use differential structure design. Definition: In layman's terms, the driver sends two equal-valued, inverted signals. The receiver compares the difference between the two voltages to determine whether the logic state is "0" or "1". The pair of traces carrying the differential signals is called a differential trace.
Compared with ordinary single-ended signal traces, the most obvious advantages of differential signals are reflected in the following three aspects:
The anti-interference ability is strong, because the coupling between the two differential traces is very good. When there is noise interference from the outside, it is almost simultaneously coupled to the two lines, and the receiving end only cares about the difference between the two signals, so the outside world The common mode noise can be completely offset.
The same principle can be effectively suppressed. Because the polarities of the two signals are opposite, the electromagnetic fields radiated by them can cancel each other. The closer the coupling is, the less electromagnetic energy is discharged to the outside.
Timing positioning is accurate. Since the switching change of the differential signal is located at the intersection of the two signals, unlike the ordinary single-ended signal, which depends on the high and low threshold voltages, it is less affected by the process and temperature, which can reduce the timing error. It is also more suitable for circuits with low amplitude signals. The currently popular LVDS (low voltage differential signaling) refers to this small amplitude differential signaling technique.
For PCB engineers, the most important thing is to ensure that these advantages of differential traces are fully exploited in the actual trace. Perhaps anyone who has been exposed to Layout will understand the general requirements for differential routing, which is "equal length, equidistance."
The equal length is to ensure that the two differential signals maintain the opposite polarity at all times, reducing the common mode component; the equidistance is mainly to ensure that the differential impedance of the two is consistent and the reflection is reduced. "As close as possible to the principle" is sometimes one of the requirements for differential routing.
4. Serpentine line:
Serpentine lines are a type of routing that is often used in Layout. Its main purpose is to adjust the delay and meet the system timing design requirements. Designers must first have the understanding that serpentine lines can destroy signal quality, change transmission delays, and avoid using them when wiring. However, in actual design, in order to ensure that the signal has sufficient holding time, or to reduce the time offset between the signals of the same group, it is often necessary to intentionally wind the wire.
be careful:
Differential signal lines appearing in pairs, generally parallel traces, try to make fewer vias. When holes must be punched, the two wires should be punched together to achieve impedance matching.
A group of buses with the same attributes should be routed side by side as much as possible. The vias drawn from the chip pads are as far as possible from the pads.
(3) Common rules for wiring
1, the direction control rules of the line:
That is, the alignment direction of adjacent layers is an orthogonal structure. Avoid placing different signal lines in the same direction in adjacent layers to reduce unnecessary interlayer turbulence; when it is difficult to avoid due to board structure limitations (such as some backplanes), especially when the signal rate is high, It should be considered to isolate each wiring layer with a ground plane and isolate the signal lines with a ground signal line.
2. Open loop inspection rules for the line:
It is generally not allowed to have a floating line (Dangling Line) at one end, mainly to avoid the "antenna effect" and to reduce unnecessary interference radiation and acceptance, which may bring unpredictable results.
3. Impedance matching check rules:
The wiring width of the same network should be consistent. The variation of the line width will cause the characteristic impedance of the line to be uneven. When the transmission speed is high, reflection will occur. This should be avoided in the design. Under certain conditions, such as the connector lead-out line and the similar structure of the lead-out line of the BGA package, the line width variation may not be avoided, and the effective length of the inconsistent portion in the middle should be minimized.
4. Trace length control rules:
That is, the short-line rule should be designed to minimize the length of the wiring to reduce the interference caused by the long trace, especially for some important signal lines, such as the clock line. Be sure to place the oscillator very close to the device. The place. In the case of driving multiple devices, the network topology should be determined according to the specific situation.
5, chamfering rules:
Avoid sharp angles and right angles in PCB design, generate unnecessary radiation, and have poor process performance.
6, device decoupling rules:
Add the necessary decoupling capacitors on the printed board to filter out the interference signal on the power supply to stabilize the power signal. In the multi-layer board, the position of the decoupling capacitor is generally not too high, but for the double-layer board, the layout of the decoupling capacitor and the way of wiring the power supply will directly affect the stability of the whole system, sometimes even related to the design. Success or failure.
In the two-layer board design, the current should first be filtered by the filter capacitor before being used by the device.
In high-speed circuit design, the correct use of decoupling capacitors is related to the stability of the entire board.
7, device layout partition / layering rules:
Mainly to prevent mutual interference between modules of different working frequencies, while minimizing the wiring length of the high frequency part.
For the hybrid circuit, the analog and digital circuits are also arranged on both sides of the printed board, respectively, using different layer wirings, and the ground layer is isolated in the middle.
8, ground loop rules:
The minimum rule of the loop, that is, the ring area formed by the signal line and its loop should be as small as possible. The smaller the ring area, the less external radiation and the smaller the interference from the outside.
9. Power and ground layer integrity rules:
For areas with dense vias, care should be taken to avoid holes in the power supply and the hollowed out areas of the formation, forming a division of the planar layer, thereby destroying the integrity of the planar layer and, in turn, increasing the loop area of the signal line in the formation. .
10, 3W rules:
In order to reduce crosstalk between lines, it should be ensured that the line spacing is large enough. When the line center spacing is not less than 3 times the line width, 70% of the electric field can be kept from interfering with each other, which is called 3W rule. To achieve 98% of the electric field does not interfere with each other, a 10W spacing can be used.
11, shielding protection
Corresponding to the ground loop rule, in fact, in order to minimize the loop area of the signal, it is more common in some important signals, such as clock signals and synchronization signals. For some signals that are particularly important and have a particularly high frequency, copper shaft cables should be considered. The shielding structure design is to isolate the ground wire on the left and right sides of the wire, and also consider how to effectively combine the shielding ground with the actual ground plane.
12, the line termination network rules:
In a high-speed digital circuit, when the delay time of the PCB wiring is greater than 1/4 of the signal rise time (or fall time), the wiring can be regarded as a transmission line, in order to ensure that the input and output impedances of the signal and the impedance of the transmission line are correctly matched, Various forms of matching methods can be employed, and the selected matching method is related to the connection mode of the network and the topology of the wiring.
For point-to-point (one output corresponds to one input) connection, you can choose the start series match or the terminal parallel match. The former has a simple structure and low cost, but the delay is large. The latter has a good matching effect, but the structure is complicated and the cost is high.
For point-to-multipoint (one output corresponds to multiple outputs) connections, when the topology of the network is daisy-chained, the terminal should be selected for parallel matching. When the network is a star structure, you can refer to the point-to-point structure. Star and daisy chain are two basic topologies. Other structures can be seen as deformations of the basic structure. Some flexible measures can be taken to match. In practice, it is necessary to take into account factors such as cost, power consumption, and performance. Generally, no perfect match is pursued, as long as interference such as reflection caused by mismatch is limited to an acceptable range.
13, the loop closed loop inspection rules:
Prevent signal lines from forming self-loops between different layers. Such problems are prone to occur in multi-layer board designs, and self-loop will cause radiated interference.
14. Branch length control rules for the line:
Try to control the length of the branches. The general requirement is Tdelay<=Trise/20.
15. Resonance rules for traces:
Mainly for the design of high-frequency signals, that is, the length of the wiring must not be an integral multiple of its wavelength, so as to avoid resonance.
16. Control rules for isolated copper areas:
The emergence of isolated copper areas will bring some unpredictable problems, so connecting isolated copper areas with other signals will help improve signal quality, usually by grounding or deleting isolated copper areas. In the actual production, the PCB manufacturer added some copper foil to the vacant part of some boards, which is mainly for the convenience of the processing of the printed board, and also has a certain effect on preventing the warpage of the printed board.
17, overlapping power and ground layer rules:
Different power planes should be spatially avoided to overlap. Mainly to reduce the interference between different power supplies, especially between power supplies with large voltage differences, the overlap of the power plane must be avoided, and it is difficult to avoid the middle interval.
18, 20H rules:
Since the electric field between the power layer and the ground layer changes, electromagnetic interference is radiated outward at the edge of the board. It is called the edge effect.
The solution is to shrink the power plane so that the electric field is only conducted within the ground plane. With an H (dielectric thickness between power and ground), if the internal shrinkage is 20H, 70% of the electric field can be confined to the edge of the grounding layer; if it is retracted by 100H, the electric field of 98% can be limited.
(4) Other
For single and double board power lines should be as thick and short as possible. The width of the power and ground lines can be calculated according to the current of 1mm and the current corresponding to 1A. The loop formed by the power supply and ground should be as small as possible.
In order to prevent the power supply line from being connected to the load device when the power line is long, the power supply should be removed before entering each device. And in order to prevent mutual interference with each other, the power supply of each load is independently removed, and filtering is first performed before entering the load.
